{"id":1076,"date":"2018-08-30T11:28:25","date_gmt":"2018-08-30T11:28:25","guid":{"rendered":"http:\/\/nehruplacements.com\/?p=1076"},"modified":"2018-08-30T11:28:25","modified_gmt":"2018-08-30T11:28:25","slug":"indus-teqsite-pvt-ltd-data-patterns-campus-drive-for-2018-2019-passing-out-batch-students","status":"publish","type":"post","link":"http:\/\/nehruplacements.com\/index.php\/2018\/08\/30\/indus-teqsite-pvt-ltd-data-patterns-campus-drive-for-2018-2019-passing-out-batch-students\/","title":{"rendered":"INDUS TEQSITE PVT LTD( DATA PATTERNS) CAMPUS DRIVE FOR 2018-2019 PASSING OUT BATCH STUDENTS"},"content":{"rendered":"
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INDUS TEQSITE PVT LTD( DATA PATTERNS)\u00a0<\/span>has accepted the invitation for campus recruitment drive and we going to host the pool drive on\u00a031st Aug 2018<\/span><\/span>\u00a0at Karunya University.Kindly find the job description and send us the\u00a0eligible\u00a0students database.<\/span><\/div>\n
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COMPANY NAME:\u00a0<\/span>INDUS TEQSITE PVT LTD( DATA PATTERNS)<\/span><\/div>\n
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JOB LOCATION : CHENNAI<\/span><\/div>\n
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DATE & TIME OF INTERVIEW:\u00a031st Aug 2018<\/span><\/span>\u00a0&\u00a09 AM<\/span><\/span><\/span><\/div>\n
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VENUE: KARUNYA UNIVERSITY,COIMBATORE<\/span><\/div>\n
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ABOUT COMPANY:<\/span><\/div>\n
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Indus Teqsite Pvt Ltd. (IT),\u00a0the parent company of\u00a0Data Patterns (India) Pvt Ltd. (DP), is a leading developer & manufacturer of test systems and on-board avionics systems for Defence and Aerospace applications. We are an\u00a0AS9100 Rev ‘C’\u00a0certified company with more than 2 decades of legacy in indigenous design & manufacturing solutions for Data Acquisition and Control, Signal Conditioning, Simulation, Communication, Switching etc. and our clients include the likes of\u00a0ISRO, DRDO, BEL and HAL.
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JOB PROFILE-1<\/u><\/span><\/div>\n
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Engineer Trainee – Hardware Design and Development (HDD) –\u00a0(Only Male candidates)<\/span>
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\nJob Location: Chennai<\/p>\n

Qualifications :\u00a0BE (ECE) \/ BE (EEE) \/ BE (E&I)<\/p>\n<\/div>\n

Required Skill sets :\u00a0Basics of Electronics (Analog and Digital circuits) Microprocessor & Microcontroller, ADCs, DACs, Multiplexers, LIC, OPAMP, Transistor, Diode etc.,<\/div>\n
Good written and spoken communication skills.<\/p>\n<\/div>\n
Test :\u00a0Aptitude +\u00a0Hardware Technical (Basics of analog + digital Electronics)<\/div>\n
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JOB PROFILE-2<\/u><\/span><\/pre>\n<\/div>\n
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\nEngineer Trainee – Software Development Group (SDG)\u00a0<\/span>(Only Male candidates)<\/span><\/div>\n
\nJob Location: Chennai<\/p>\n
Qualifications :\u00a0BE (CSE) \/BE (ECE) \/ BE (EEE) \/ BE (E&I)<\/p><\/div>\n
Required Skill sets :\u00a0Knowledge in C, C++, Assembly, Data Structures, OS concepts, Microprocessor, Microcontroller and good system programming skills<\/div>\n
Good written and spoken communication skills.<\/div>\n
Test :\u00a0Aptitude +\u00a0Software Technical (C language test)<\/div>\n
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\nCTC: 1,80,000\/- annum (with ESI & PF deduction) – 1st year<\/p>\n
CTC: 2,64,000\/- annum (with ESI & PF deduction) – 2nd year<\/p>\n
CTC: 3,84,000\/- annum (with PF deduction) – 3rd year<\/span><\/span><\/div>\n
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\nEligibility criteria\u00a0:<\/span><\/span><\/div>\n
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1. Candidates who will be passing out in 2018.
\n2. Aggregate of 65% & above in 10th,12th and Graduation.<\/span><\/div>\n
3. No standing arrears as on date<\/span><\/div>\n
4. Good written and verbal communication skills is required.<\/span><\/div>\n
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\nWritten test will be for 90 minutes ( 1 hour technical and 30 minutes aptitude)<\/span><\/div>\n
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\nThe eligible students should bring one resume and one passport size photograph.<\/span><\/div>\n
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\nImportant:<\/span>Terms & Conditions of our employment for the eligible students.<\/span><\/span><\/div>\n